The present invention relates to thin film transistors, particularly to the fabrication of thin film transistors, and more particularly to a method for the formation of silicon based thin film transistors on inexpensive, low-temperature plastic substrates.
Conventional processing techniques used to fabricate high-performance (polycrystalline) silicon thin film transistors (TFTs) require processing temperatures of at least 600xc2x0 C. This minimum temperature requirement is imposed by silicon crystallization and dopant activation anneals. Although amorphous silicon (a-Si) TFT""s (which do not require crystallization and activation anneals) can be fabricated at much lower temperatures (as low as 250xc2x0 C.), the poor performance of these devices severely limits their range of applications. One of the factors limiting the minimum process temperatures for a-Si devices is that a-Si deposited at very low temperatures contains excessive hydrogen resulting from the deposition process (such as PECVD). Amorphous silicon films deposited by other techniques, such as sputtering or evaporation, are found to have poor electrical properties, rendering them marginally useful for most TFT applications.
Recently a process was developed for crystallizing and doping amorphous silicon on a low cost, so-called low-temperature plastic substrate using a short pulsed high energy source in a selected environment, without heat propagation and build-up in the substrate so as to enable use of plastic substrates incapable of withstanding sustained processing temperatures higher than about 180xc2x0 C. Such a process is described and claimed in U.S. Pat. No. 5,346,850 issued Sep. 13, 1994 to J. L. Kaschmitter et al., assigned to the Assignee of the instant application. Also, recent efforts to utilize less expensive and lower temperature substrates have been carried out wherein the devices were formed using conventional temperatures on a sacrificial substrate and then transferred to another substrate, with the sacrificial substrate thereafter removed. Such approaches are described and claimed in U.S. Pat. No. 5,395,481 issued Mar. 7, 1995, U.S. Pat. No. 5,399,231 issued Mar. 21, 1995, and U.S. Pat. No. 5,414,276 issued May 9, 1995, each issued to A. McCarthy and assigned to the assignee of the instant application.
As exemplified by above-referenced U.S. Pat. No. 5,346,850, high performance polycrystalline silicon devices have been produced at low temperatures ( less than 250xc2x0 C.). This is accomplished by crystallizing the amorphous silicon layer (and activating dopants) with a short-pulse ultra-violet laser, such as an XeCl excimer laser having a wavelength of 308 nm. The extremely short pulse duration (20-50 ns) allows the silicon thin film to melt and recrystallize without damaging the substrate or other layers in the device. Polycrystalline layers produced in this manner provide high carrier mobilities and enhanced dopant concentrations, resulting in better performance.
The present invention provides a method or process for fabricating amorphous and polycrystalline channel silicon TFT""s at temperatures sufficiently low to prevent damage to low cost, so-called low-temperature plastic substrates, whereby the use of high cost, so-called high temperature plastics, such as KAPTON, manufactured by Dupont Corp., and capable of withstanding temperatures of 400-450xc2x0 C., can be eliminated, thus reducing the manufacturing costs as well as significantly increasing the type of plastic substrates that can be utilized in the fabrication of TFTs. In addition, plastic substrates have several advantages over conventional substrates, such as glass or silicon in that plastic can be much less expensive, lighter, more durable, rugged, and flexible.
It is an object of the present invention to enable fabrication of silicon-based thin film transistors on plastic substrates.
A further object of the invention is to provide a method for manufacturing thin film transistors wherein low cost, low-temperature substrates can be utilized.
Another object of the invention is to provide a method for fabricating thin film transistors involving replacement of standard fabrication procedures with procedures utilizing sufficiently lower processing temperatures so that inexpensive plastic substrates may be used.
Another object of the invention is to provide a method of fabricating thin film transistors wherein inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates.
Another object of the invention is to enable the manufacture of thin film transistors using plastic substrates which enable use for large area low cost electronics, such as flat panel displays and portable electronics.
Other objects and advantages of the present invention will become apparent from the following description and accompanying drawings. The invention involves a method for the formation of thin film transistors on inexpensive plastic substrates. The method of this invention utilizes sufficiently lower processing temperatures so that inexpensive plastic substrates may be used. The so-called low-temperature plastic substrates have several advantages over conventionally used substrates such as glass, quartz, silicon, and high-temperature plastic (i.e. KAPTON). Processing temperatures of the method of this invention are such that sustained temperatures are below a temperature of 250xc2x0 C. although short duration high temperatures are used during the processing. This is accomplished using pulsed laser processing which produces the needed temperatures for short time periods while maintaining the sustained temperature of the substrate below a damage threshold (i.e. below about 250xc2x0 C.). Thus, by the use of fabrication techniques the sustained temperature of the substrate is sufficiently low to prevent damage to inexpensive low-temperature plastic substrates. The present invention provides a method which relies on techniques for depositing semiconductors, dielectrics, and metal at low temperatures, crystallizing and doping semiconductor layers in the TFT with a pulsed energy source, and creating top-gate, top-gate self-aligned, as well as back-gate TFT structures.